CY2DL818 buffer equivalent, 1:8 clock fanout buffer.
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* Low voltage operation VDD = 3.3V 1:8 fanout Single-input-configurable for LVDS, LVPECL, or L.
the large fanout from a single input reduces loading on the input clock. The Cypress CY2DL818 is ideal for both level t.
This Cypress series of network circuits is produced using advanced 0.35-micron CMOS technology, achieving the industry’s fastest logic. The Cypress CY2DL818 fanout buffer features a single LVDS or a single-ended LVTTL-compatible input and eight LVDS .
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